The present invention is related to a semiconductor device, a method for manufacturing the semiconductor device, and an electronic device that includes the semiconductor device.
In semiconductor devices, laterally diffused metal oxide semiconductor (LDMOS) transistor devices may have desirable performance characteristics, such as desirable thermal stability, frequency stability, durability, etc. Therefore, LDMOS transistor devices have been widely used in code division multiple access (CDMA) devices, wideband code division multiple access (WCDMA) devices, digital televisions, etc.
FIG. 1 shows a schematic cross-sectional view that illustrates structures of an LDMOS transistor device (or LDMOS device). The LDMOS device may include the following elements: a P-type substrate 100, a P-well 1001 formed in the P-type substrate 100, an N-well 1002 formed in the P-type substrate 100, an N-type source electrode 101 (or source 101) positioned in the P-well 1001, an N-type drain electrode 102 (or drain 102) positioned in the N-well 1002, a gate electrode 103 (or gate 103) positioned on the P-type substrate 100, a P-type body electrode 104 positioned in the P-well 1001, and a shallow trench isolation (STI) element 1003 positioned in the P-type substrate. Each of the source electrode 101, the gate electrode 103, and the body electrode 104 may have a ring-shaped structure and may surround the drain electrode 102 in a plan view of the LDMOS device.
In the LDMOS device, the drain electrode 102 may be used as a pickup region that is electrically connected to an inductive load through an ohmic contact, such that the LDMOS device may be used in an inductive load mode. When a negative pulse caused by the inductive load is applied to the drain electrode 102, forward conduction may be provided at the PN junction formed by the P-type substrate 100 and the N-well 1002. As a result, a large electric current may undesirably flow into the P-type substrate, such that the performance of the LDMOS device may be adversely affected.